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设计了一种用于逐次逼近型模数转换器中的比较器失调和电容失配自校准电路.通过增加校准周期,该电容自校准结构即可与原电路并行工作,实现高精度与低功耗.校准精度可达14bit .采用该电路设计了一个用于逐次逼近型结构的10bit 3 Msps模数转换器单元,该芯片在SMIC 0.18μm1.8V工艺上实现,总的芯片面积为0.25mm2.芯片实测,在采样频率为1.8MHz ,输入320kHz正弦波时,信号噪声失真比为55.9068dB,无杂散动态范围为64.5767dB,总谐波失真为-74.8889dB,功耗为3.1mW.
A self-calibration circuit of comparator mismatch and capacitance mismatch for successive approximation analog-to-digital converter is designed.It can work in parallel with the original circuit by increasing the calibration period to achieve high precision and low power The calibration accuracy is up to 14bit. A 10bit 3 Msps analog-to-digital converter unit designed for successive approximation is designed by using this circuit. The chip is implemented on the SMIC 0.18μm1.8V process with a total chip area of 0.25mm2. Chip measured, the sampling frequency of 1.8MHz, input 320kHz sine wave, the signal noise distortion ratio of 55.9068dB, spurious-free dynamic range of 64.5767dB, total harmonic distortion of -74.8889dB, power consumption of 3.1mW.