SFDR相关论文
This paper presents a high speed ROM-less direct digital frequency synthesizer (DDFS) which has a phase resolution of 32......
This paper presents a 10-GHz 8-bit direct digital synthesizer(DDS) microwave monolithic integrated circuit implemented i......
This paper describes a 12-bit 40 MS/s calibration-free pipelined analog-to-digital converter(ADC),which is optimized for......
A high linearity,undersampling 14-bit 357 kSps cyclic analog-to-digital convert(ADC) is designed for a radio frequency i......
This paper presents a two-mode digital calibration technique for pipelined analog-to-digital converters (ADC).The propos......
A 12-bit 30 MSPS pipeline analog-to-digital converter(ADC) implemented in 0.13-μm 1P8M CMOS technology is presented.Low......
A low power 12-bit 200-kS/s SAR ADC is proposed.This features a differential time domain comparator whose offset is canc......
This paper presents a design of 14-bit 80 Msample/s pipelined ADC implemented in 0.35μm CMOS. A charge-sharing correcti......
This paper presents a novel direct digital frequency synthesizer(DDFS)architecture based on nonlinear DAC coarse quantiz......
This paper presents a 6-bit 20-MS/s high spurious-free dynamic range(SFDR) and low power successive approximation regist......
This paper describes a 14-bit 100-MS/s calibration-free pipelined analog-to-digital converter(ADC).Choices for stage res......
This paper demonstrates a 14-bit 100 MS/s CMOS pipelined analog-to-digital converter(ADC). The nonlinearity model for bo......
上海贝岭在已经完成的核高基01专项嵌入式高速模拟数字转换电路IP核心技术积累的基础上,力求实现高速ADC核心技术的商品化。在此基......
This paper presents a 10 bit successive approximation register(SAR) analog-to-digital converter(ADC)in 0.18 m 1P6 M CMOS......
Maxim最新推出MAX19692 12位、2．3Gsps数/模转换器(DAC),该款DAC能够在多个奈奎斯特频带直接合成高频、宽带信号,为高速DAC确立了新......
五、放大器无虚假动态范围(SFDR)放大器的无虚假动态范围定义为:当输入信号从其最小可检测灵敏度 Pmin 增加到放大器输出端刚出现......
高精度D/A转换器的实际精度往往低于理论上的精度。针对这个长期困扰的难题,在设计16位D/A转换器的过程中,提出了一种熔丝修调技术......
软件无线电技术在商用和军用无线电通信领域越来越显示出其强大的吸引力,而ADC是软件无线电的关键技术.概括了A/D转换器在无线电接......
