采用FSM在FPGA上设计了IIC总线控制器。系统上电后它可自动从AT 24C02C芯片中读取数据;从上位机接收到新的数据后,它也可自动将其存储到AT 24C02C中。该IIC总线控制器应用于冲击波超压测试系统中,可自动读取和保存重要工作参数。在实验室环境下,IP核仿真准确。通过分析爆炸场试验中获得的有效数据,可以看出该IP核具有很高的可靠性。 Using FSM IIC bus controller designed on the FPGA. After the system is powered on, it can automatically read data from the AT24C02C chip; after receiving new data from the host computer, it can also automatically store it in the AT24C02C. The IIC bus controller used in shock wave overpressure test system, can automatically read and save important operating parameters. In the laboratory environment, IP core simulation is accurate. By analyzing the available data from the blasting tests, we can see that the IP core has high reliability.