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CORDIC算法由于其高速度和高精度而被广泛应用于直接数字频率合成器(DDS)等数字通信电路领域。在传统CORDIC算法的基础上,对CORDIC算法进行改进,减小了传统CORDIC算法所需的ROM空间,提高了电路运行速度;完成了DDS电路的设计。采用Altera公司Cyclone Ⅱ系列芯片EP2C5AF256A7进行FPGA验证,资源得到了节省。
The CORDIC algorithm is widely used in digital communication circuits such as a direct digital frequency synthesizer (DDS) due to its high speed and high precision. Based on the traditional CORDIC algorithm, the CORDIC algorithm is improved to reduce the ROM space required by the traditional CORDIC algorithm and improve the circuit running speed. The DDS circuit design is completed. Using Altera Cyclone Ⅱ series chips EP2C5AF256A7 for FPGA verification, resources have been saved.