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最近研制了一种高压MOS集成电路,该电路由具有400V,0.5A输出能力的16高压NMOS管阵列及其控制CMOS逻辑电路组成。它内部的高压和低压NMOS管做成了屏蔽源结构,从而完全地实现了无寄生双极效应的高压MOS集成电路。 事实上,这种集成电路在200V,2MHz下已成功地驱动了等离子体显示板而无任何寄生效应,其工作的高可靠性已得到证实。 为了探讨高集成度的可能性,试验研究了在高压晶体管之间,低压晶体管之间以及高压和低压晶体管之间的相互影响产生的寄生双极效应。结果,证实了“屏蔽源结构”可以实现高密度的高压MOS集成电路。
A high-voltage MOS integrated circuit has recently been developed that consists of a 16-high NMOS transistor array with 400V, 0.5A output capability and its control CMOS logic. Its internal high-voltage and low-voltage NMOS tube shield made of the source structure, so as to fully realize the parasitic bipolar high-voltage MOS integrated circuits. In fact, this IC has been successfully driven at 200V, 2MHz plasma display panel without any parasitic effects, the reliability of its work has been confirmed. In order to explore the possibility of high integration, the parasitic bipolar effect caused by the interaction between high-voltage transistors, low-voltage transistors and between high-voltage and low-voltage transistors was investigated experimentally. As a result, it was confirmed that the “shield source structure” can realize a high-density high-voltage MOS integrated circuit.