本文综述了逻辑电路自校验技术的形成过程。将其与其它容错技术归纳作了统一的形式化定义,指出它们之间的关连和区别。文章着重论述了在自校验实现中安全故障集Fs和可自测故障Ft之间存在着的密切关系。提出自校验作为超可靠性数字系统的一种可能途径。最后指出由于大规模数字集成电路工艺的发展,近年来自校验研究的背景和重点正在转向为电路生产服务的动向。 This article reviews the formation of logic circuit self-checking techniques. Summarized it with other fault-tolerant technologies for a unified formal definition, pointing out the connection and difference between them. The paper focuses on the close relationship between the safety fault set Fs and self-testable fault Ft in self-calibration. Proposed as a possible way of self-checking as an ultra-reliable digital system. Finally, it points out that due to the development of large-scale digital integrated circuit technology, the background and emphasis of verification research in recent years are turning to the trend of serving circuit manufacturing.