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ＡＢＣ９５阵列机是１６个节点组成的ＳＩＭＤ并行计算机．在用ＦＰＧＡ设计实现此机器时的主要问题是ＦＰＧＡ利用率太低。介绍几种优化手段，将ＡＬＵ、乘法器和译码器都用ＦＰＧＡ实现。这样减少了系统各模块之间的连线数，达到了提高ＦＰＧＡ利用率的目的。
The ABC95 array is a 16-node SIMD parallel computer. The main problem in designing this machine with an FPGA is that FPGA utilization is too low. Describe several optimization methods, the ALU, multipliers and decoders are implemented using FPGA. This reduces the number of connections between the system modules, to achieve the purpose of improving FPGA utilization.