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一、引言随着双极存贮器的不断发展,人们在降低它的功耗、增加密度方面做了大量的工作。到目前为止,除了保持它固有的高速特性以外,在功耗和集成度方面已取得可以和MOS比拟的可喜成果。夹断电阻存贮单元的提出并用到实践中去就是这一成果的具体体现之一。一般的双极存贮单元要降低功耗就要增加负载电阻。而用一般扩散办法制做大的负载电阻,势必要占去很大的硅片面积。同时也损失了双极存贮器的高速性。为了解决这个问题,有人曾提出集电极阻抗转换存贮单元,比较好的解决了上述问题。但是,由于这种方案增加了有源器件,使单元制做比较复杂。1974年3月,S·K Widman发表“Pinch lead resistors shrink bipolar memory cell”夹断负载电阻缩小双极存贮器
I. INTRODUCTION With the continuous development of bipolar memory, people have done a great deal of work in reducing its power consumption and increasing its density. So far, in addition to maintaining its intrinsic high-speed nature, promising results in terms of power consumption and integration have been achieved that can be compared with MOS. One of the concrete manifestation of this achievement is that the pinch-off resistance memory cell is proposed and used in practice. The average bipolar memory cell to reduce power consumption will increase the load resistance. With the general proliferation of large load resistance system, it is bound to take up a lot of silicon area. At the same time, the high speed of bipolar memory is lost. In order to solve this problem, it has been proposed that the collector impedance conversion memory cell, a better solution to the above problems. However, due to the increased active devices in this solution, the cell fabrication is complicated. In March 1974, SK Kidman published “Pinch lead resistors shrink bipolar memory cell” pinch-off load resistance shrink bipolar memory