论文部分内容阅读
研制了一种改进的栅组装密度的新型通路孔(Via-Hole)电镀热沉结构的K波段GaAs功率FET。由于源接地压点下面的通路孔做在FET有源区的外边,这种结构的栅组装密度比通常直接接地的通路孔结构高四倍以上。增加了栅组装密度并允许设计具有更大栅周边的高频大功率FET。0.7μm栅长、2.4mm栅周边的器件,在20GHz下以5.0dB的增益和19.2％的功率附加效率输出1.1W(30.4dBm)功率。而在30GHz下输出0.74W(28.7dBm)装配在气密封装的管壳内的同类器件,在20GHz下,以4.8dB的增益和13％的功率附加效率给出1W(30dBm)的输出功率。新型通路孔电镀热沉FET做了热性能试验和机械环境试验来评价其可靠性,结果表明,通过全部试验,器件参数没有失效也没有明显的变化。
A K-band GaAs power FET with a new Via-Hole plating heat sink structure with improved gate packing density has been developed. Since the via hole under the source ground pin is made outside the active area of the FET, the gate assembly density of this structure is more than four times higher than that of the via hole structure, which is normally directly grounded. Increase gate packing density and allow the design of high-frequency, high-power FETs with a larger gate periphery. 0.7 μm gate length, 2.4 mm gate periphery, 1.1 W (30.4 dBm) power output at 20 GHz with 5.0 dB gain and 19.2% additional power efficiency. While the 0.74W (28.7dBm) output at 30GHz puts it in a hermetically-sealed package with 1W (30dBm) output power at 20GHz with 4.8dB gain and 13% additional power efficiency. The new via hole plating heat sink FET has done thermal performance test and mechanical environment test to evaluate its reliability. The results show that the device parameters have no failure and no obvious change through all the experiments.