通常的延迟电路是将脉冲的上升沿或下降沿延迟一段时间,而输出脉冲的宽度仅由延迟电路本身决定,与输入脉宽无关.但是在某些应用场合,要求对脉冲的前后沿进行相等的延迟,使输出和输入的脉宽仍然保持相等.这种将脉冲“整个地”往后推迟的线路称为“全脉冲延迟器”或“前后沿等延迟线路”.图1、图2、图3所给出的线路有一个共同的特点,就是只有当输入脉宽大于所设定的延迟时间时,线路 The usual delay circuit delays the rising edge or falling edge of the pulse for a period of time while the width of the output pulse is determined by the delay circuit alone regardless of the input pulse width but in some applications it is required to equalize the leading and trailing edges of the pulse So that the output and input pulse width will remain equal to this pulse will be “all ” postponed line is called “all pulse delay ” or “front and rear delay lines ”. Figure 1, Figure 2, Figure 3 has given the line has a common characteristic, that is, only when the input pulse width greater than the set delay time, the line