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众所周知,用通常的P-MOS工艺制造集成电路时,就需要四次光刻三次对位。因而,所用的掩模版多对位的次数也多。这样、掩模版的缺陷和对位的好坏直接影响产品的成品率。与此同时,由于硅片的表面直接和水气、试剂等接触次数多,增加了沾污来源。 为此,提出了一种用两块版制造P-MOS集成电路的工艺,这种方法具有操作简便,减少工序、提高成品率和降低成本等优点。 制造P-MOS集成电路所用的是晶面为(100)、电阻率为3～5欧姆·厘米的n型硅。 工艺过程是先用1050℃高温氧化法生长一层600埃致密的SiO_2,接着用硅烷和氨气作为源在氮气气氛中在780℃的温度下生长一层400埃的Si_3N_4(此温度高于800℃时难以腐蚀),而后再在Si_3N_4上用硅烷和氧气在氮气中480℃温度下由CVD法生长一层3000埃软的SiO_2。这样就形成了Si—SiO_2—Si_3N_4—SiO_2的结构。 然后,涂光刻胶,作第一次光刻,在软SiO_2上腐蚀出窗口。接着用SiO_2作为掩蔽,用1:1的磷酸和水腐蚀液在150℃下刻蚀Si_3N_4之后腐蚀下面的SiO_2,这时在上面的软SiO_2已腐蚀得差不多,剩下的SiO_2在蒸铝以前的腐蚀中完全去除掉。 在光刻之后,用CVD法在硅上淀积BN。反应气体是高纯氢气、氨气和用氢气稀释到5％的硼烷。反应温度范围为700℃～1250℃。反应气体的流量(B_2H_6+N
As we all know, the usual P-MOS process to manufacture integrated circuits, you need four lithography three times. Therefore, the mask used more than the number of alignment. In this way, the reticle defects and alignment of a direct impact on product yield. At the same time, as the surface of the silicon wafer is directly contacted with moisture, reagents and the like, the source of contamination is increased. For this reason, a process of manufacturing P-MOS integrated circuit with two plates is proposed, which has the advantages of simple operation, reduction of process, improvement of yield and cost reduction. The P-MOS integrated circuit is made of n-type silicon with a crystal plane of (100) and a resistivity of 3 to 5 ohm-cm. In the process, a layer of 600-angstrom dense SiO 2 is first grown by high-temperature oxidation at 1050 ° C., and then a layer of 400-angstrom Si 3 N 4 is grown under a nitrogen atmosphere at a temperature of 780 ° C. using silane and ammonia as sources (the temperature is higher than 800 ° C), and then a layer of 3000 Å soft SiO 2 was grown by CVD on Si_3N_4 with silane and oxygen at 480 ° C in nitrogen. In this way, the structure of Si-SiO_2-Si_3N_4-SiO_2 is formed. Then, a photoresist is applied for the first lithography and the window is etched out on the soft SiO_2. Then with SiO 2 as a mask, with 1: 1 phosphoric acid and water etching solution at 150 ℃ after etching Si_3N_4 corrosion below SiO_2, when the above soft SiO_2 has been almost eroded, and the rest of the SiO_2 before the aluminum Corrosion completely removed. After lithography, BN was deposited on silicon by the CVD method. The reaction gases are high purity hydrogen, ammonia and borane diluted to 5% with hydrogen. The reaction temperature range is 700 ℃ ~ 1250 ℃. Reaction gas flow (B_2H_6 + N