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This paper deals with how to implement AMBA bus transaction level modeling in SystemC. There are two main techniques used in the whole modeling process, which consist of starting the platform modeling at the transaction level and using the uniformed modeling language—? ㏒ystem C. According to the concepts of interface, port and hierarchical channel introduced in SystemC 2.0, the system of master-channel (AMBA bus) slave is created as the architecture of the AMBA bus transaction level model, which can make it more extendable. The port and interface classes of the model that are prone to program are defined in accordance with the SoC hierarchical design methodology. In addition, method calls, not signal communication, are used between different modules in the model, so the higher-level abstraction is achieved and the simulation performance is improved. The AMBA bus transaction level model is analyzed and certified by simulation experiment, and proved to be completely compliant to the AMBA specification 2.0.
This paper deals with how to implement AMBA bus transaction level modeling in SystemC. There are two main techniques used in the whole modeling process, which consist of starting the platform modeling at the transaction level and using the uniformed modeling language-? ㏒ystem C. According to the concepts of interface, port and hierarchical channel introduced in SystemC 2.0, the system of master-channel (AMBA bus) slave is created as the architecture of the AMBA bus transaction level model, which can make it more extendable. The port and interface classes of the model that are prone to program are defined in accordance with the SoC hierarchical design methodology. simulation performance is improved. The AMBA bus transaction level model is analyzed and certified by simulation experiment, and proved to be completely compliant to th e AMBA specification 2.0.