存储器内建自测试是当前针对嵌入式随机存储器测试的一种经济有效的途径。它实质是 BIST测试算法在芯片内部的硬件实现,形成“片上BIST测试结构”,作为E RAM核与芯片系统其他逻辑电路的接口,负责控制功能,实现片上E RAM的自动测试。根据一个实际项目,本文介绍了MBIST的整体设计过程,并针对测试开销等给出了定量和定性的讨论。 Memory built-in self-test is currently a cost-effective approach to embedded random-access memory testing. It is essentially a BIST test algorithm in-chip hardware implementation, the formation of “on-chip BIST test structure” as E RAM core and other logic chip system interface, is responsible for control functions, to achieve on-chip E RAM automatic test. Based on a practical project, this article introduces the overall design process for MBIST and gives quantitative and qualitative discussions on test overhead.