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近年来,金属氧化物半导体场效应晶体管(MOSFET)的特征尺寸减小并进入纳米尺度,为了改善器件的短沟道效应,器件由原来的平面结构改为立体结构。而在立体结构器件中,沟道由不同于传统Si(100)晶面的Si晶面所组成。因此,为了了解不同Si晶面上器件反型层空穴迁移率的变化情况,在不同晶面Si衬底上分别制作了pMOSFET,并研究了器件的空穴迁移率。采用Split C-V方法测试了Si(100),(110),(111)和(112)晶面上器件的空穴迁移率。结果表明,Si(110)晶面上的空穴迁移率最大,Si(112)晶面上<111>沟道方向空穴迁移率比(110)晶面上空穴迁移率小,而略大于(100)和(111)晶面上的空穴迁移率,(100)晶面上的空穴迁移率最小。
In recent years, the characteristic size of MOSFETs has decreased and entered the nanometer scale. In order to improve the short channel effect of the device, the device is changed from the original planar structure to the three-dimensional structure. In the 3D structure device, the channel is made of Si crystal plane different from the conventional Si (100) crystal plane. Therefore, in order to understand the changes of the hole mobility of the inversion layer in different Si crystal planes, pMOSFETs were fabricated on Si substrates with different crystal planes, respectively, and the hole mobility of the devices was investigated. The hole mobility of devices on Si (100), (110), (111) and (112) planes was tested using the Split C-V method. The results show that the hole mobility on the Si (110) crystal plane is the largest, the hole mobility in the <111> channel direction on the Si (112) crystal plane is smaller than the hole mobility on the (110) crystal plane, 100) and (111) plane, the hole mobility on the (100) plane is the smallest.