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针对自适应非线性流采样(DISCO)算法硬件实现面临的一系列挑战,设计了利于硬件处理的改进算法,采用多查找表结构和“归一化”方法进行处理,完成了正确性仿真和基于现场可编程门阵列(FPGA)平台的原型验证.实验结果表明,改进算法能够实现40 Gbit/s链路的线速每流统计,消耗FPGA上的硬件逻辑资源较少,并且平均相对误差和最大相对误差均与基准DISCO算法性能接近.
Aiming at a series of challenges in hardware implementation of adaptive nonlinear flow sampling (DISCO) algorithm, an improved algorithm is designed to facilitate the hardware processing. The multi-look-up table structure and the “normalization” method are used to process the correct simulation And prototype verification based on field programmable gate array (FPGA) platform.The experimental results show that the improved algorithm can realize the linear speed per flow statistics of 40 Gbit / s link, consume less hardware logic resources on FPGA, and the average relative error And the maximum relative error are close to the performance of the benchmark DISCO algorithm.