与现行的陶瓷和层压模块等封装解决方案相比,专为高集成度RF模块而设计的CSP(chip—scale packaging,芯片规模封装)封装工艺—Pyxis平台有望使封装的成本、高度和面积分别下降50%、60%和75%。由封装工艺开发商美国的Tessera公司推出的此项技术能够将RF模块与功率放大器、收发器、滤波器以及开关等周边电路结合起来。与传统的9mm×10mm大小的层压式封装相比,Pyxis技术将无源器件以及所需衬 Compared to current packaging solutions such as ceramic and laminate modules, the CSP (chip-scale packaging) packaging process designed for highly integrated RF modules, the Pyxis platform, is expected to bring the cost, height and area of ​​the package Decreased by 50%, 60% and 75% respectively. The technology, introduced by packaging technology developer Tessera in the United States, combines RF modules with peripheral circuits such as power amplifiers, transceivers, filters, and switches. Compared with the traditional 9mm × 10mm size laminated package, Pyxis technology will be passive components and the required lining