Design and implementation of a programming circuit in radiation-hardened FPGA

来源 :半导体学报 | 被引量 : 0次 | 上传用户:tonnyliu2042
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We present a novel programming circuit used in our radiation-hardened field programmable gate array (FPGA) chip.This circuit provides the ability to write user-defined configuration data into an FPGA and then read it back.The proposed circuit adopts the direct-access programming point scheme instead of the typical long token shift register chain.It not only saves area but also provides more flexible configuration operations.By configuring the proposed partial configuration control register,our smallest configuration section can be conveniently configured as a single data and a flexible partial configuration can be easily implemented.The hierarchical simulation scheme, optimization of the critical path and the elaborate layout plan make this circuit work well.Also,the radiation hardened by design programming point is introduced.This circuit has been implemented in a static random access memory(SRAM)-based FPGA fabricated by a 0.5μm partial-depletion silicon-on-insulator CMOS process.The function test results of the fabricated chip indicate that this programming circuit successfully realizes the desired functions in the configuration and read-back.Moreover,the radiation test results indicate that the programming circuit has total dose tolerance of 1×10~5 rad(Si),dose rate survivability of 1.5×10~(11) rad(Si)/s and neutron fluence immunity of 1×10~(14) n/cm~2. We present a novel programming circuit used in our radiation-hardened field programmable gate array (FPGA) chip. This circuit provides the ability to write user-defined configuration data into an FPGA and then read it back. The proposed circuit adopts the direct-access programming point scheme instead of the typical long token shift register chain. It not only saves area but also provides flexible configuration operations.By configuring the proposed partial configuration control register, our smallest configuration section can be conveniently configured as a single data and a flexible partial configuration can be easily implemented. The hierarchical simulation scheme, optimization of the critical path and the elaborate layout plan make this circuit work well. Also, the radiation hardened by design programming point is introduced. This circuit has been implemented in a static random access memory (SRAM) -based FPGA fabricated by a 0.5 μm partial-depletion silicon-on-insulator CMOS process.Th e function test results of the fabricated chip successfully that the programming circuit successfully realizes the desired functions in the configuration and read-back. Moreover, the radiation test results indicate that the programming circuit has a total dose tolerance of 1 × 10 ~ 5 rad (Si ), dose rate survivability of 1.5 × 10 ~ (11) rad (Si) / s and neutron fluence immunity of 1 × 10 ~ (14) n / cm ~ 2.
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