Degradation characteristics of PMOSFETs under negative bias temperature-positive bias temperature-negative bias temperature (NBT-PBT-NBT) stress conditions are investigated in this paper. It is found that for all device parameters, the threshold voltage has the largest shift under the first NBT stress condition. When the polarity of gate voltage is changed to positive, the shift of device parameters can be greatly recovered. However, this recovery is unstable. The more severe degradation appears soon after reapplication of NBT stress condition. The second NBT stress causes in linear drain current to degrade greatly, which is different from that of the first NBT stress. This more severe parameter shift results from the wear out of silicon substrate and oxide interface during the first NBT and PBT stress due to carrier trapping/detrapping and hydrogen related species diffusion.