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针对电子技术实验无法进行多芯片同时测试的问题,提出了一种基于FPGA和上下位机联动配置技术的智能式多芯片测试方案。该方案实现了同一插槽测试不同芯片和集成电路测试台上多个芯片同时测试的功能。介绍了Verilog硬件描述语言编程下载和上位机控制方法与实现技术,有效解决了实验室常用芯片中不同类型芯片电源管脚上电的难题,利用FPGA器件实现了低功耗和系统可再编程升级,对于提高高校电子技术基础实验的水平和效率具有重要的实用价值。
Aiming at the problem that the electronic technology experiment can not test the multi-chip at the same time, an intelligent multi-chip test scheme based on FPGA and the configuration technology of upper and lower computer is proposed. This scheme realizes the function that the same slot tests different chips and many chips on the test bench of the integrated circuit while testing at the same time. Describes the Verilog hardware description language programming download and host computer control methods and implementation techniques to effectively solve the lab common chips in different types of chip power pin power problems, the use of FPGA devices to achieve low power consumption and system reprogrammable upgrade , Which has important practical value for improving the level and efficiency of the basic experiment of electronic technology in colleges and universities.