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本 文描述了CMOS集成电路中的闭锁现象的机理,分析了寄生PnPn可控硅的触发条件.提出了防止CMOS模拟开关电路闭锁的措施,以及本电路的版图设计和工艺设计的原则,从而实现消除闭锁现象的目的.最后介绍了研制中的CMOS模拟开关的抗闭锁性能和电路性能.
This paper describes the mechanism of latch-up in CMOS integrated circuits and analyzes the triggering conditions of the parasitic PnPn thyristor. The measures to prevent the latch-up of CMOS analog switch circuits are proposed, as well as the layout design and process design principles of the circuit, so as to eliminate The purpose of blocking phenomenon.Finally introduced in the development of CMOS analog switch anti-blocking performance and circuit performance.