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D触发器是目前应用较广的一种数字逻辑集成电路。D触发器性能的好坏需要专门的测试仪器,在业余条件下,可以根据D触发器各端的逻辑功能,用简单的方法来判断D触发器性能的好坏。下面以CMOS双D触发器CC4013为例(检查一只D触发器)介绍测试方法。 图1列出了CC4013的引脚排列图。其中,Q、是二个互补输出端,当Q端为高电平时,端为低电平,反之亦然。S是置位端,当S端为高电平时,触发器置位,Q端为高电平。R是复位端,当R端为高电平时,触发器复位,Q端为低电平。D为数据输人端,有高电平“1”与低电平“0”两种接法。CL为触发端,触发器状态的变化发生在CL端输入的脉冲上升沿来到时刻。
D flip-flop is a wide range of digital logic integrated circuits. D flip-flop performance is good or bad requires specialized test equipment, under the amateur condition, according to the D flip-flop logic functions at each end, with a simple method to determine the D flip-flop performance is good or bad. The following CMOS dual D flip-flop CC4013 as an example (check a D flip-flop) to introduce the test method. Figure 1 shows the pinout for the CC4013. Among them, Q, is two complementary output, when the Q-side is high, the terminal is low, and vice versa. S is the set end, when the S-side is high, the trigger is set, Q-side high. R is reset, when R is high, the flip-flop reset, Q-side is low. D data input terminal, a high “1” and low “0” two connection. CL is the trigger terminal, the change of the trigger state occurs when the rising edge of the pulse input on the CL terminal arrives at the moment.