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借助于铜染色技术研究了选择性氧化工艺诱生的栅氧化物缺陷。栅氧化物缺陷随机地遍布在器件有效区域,并非局部地分布在隔离氧化物的边缘。发现栅氧化膜的缺陷密度与选择性氧化层所产生的 Si_3N_4掩蔽膜的缺陷密度相当。此外,使用一种发明的新工艺,证明了栅氧化物缺陷的所在位置均与选择性氧化所诱生的 Si_3N_4掩蔽膜缺陷的位置——对应。栅氧化物缺陷是由栅氧化物减薄造成的,是在选择性氧化过程中由 Si_3N_4掩蔽膜的缺陷在 Si 衬底上形成某些氮硅化合物点的结果。发现在栅氧化之前先增加一次损失性氧化,然后深腐蚀掉生成的氧化物,或者在栅氧化前进行等离子体反应溅射腐蚀,就能大量消除栅氧化物缺陷。
Gate oxide defects induced by the selective oxidation process were studied by means of copper staining. Gate oxide defects are randomly distributed throughout the active area of the device and not locally at the edge of the isolation oxide. It is found that the defect density of the gate oxide film is equivalent to the defect density of the Si_3N_4 masking film generated by the selective oxidation layer. In addition, a new process of the invention was used to prove that the defects of the gate oxide are located at positions corresponding to defects of the Si_3N_4 masking film induced by the selective oxidation. Gate oxide defects are caused by the gate oxide thinning and are the result of the formation of some silicon nitride dots on the Si substrate by the defects of the Si 3 N 4 masking film during the selective oxidation. It has been found that a substantial loss of gate oxide defects can be substantially eliminated by adding a loss of oxidation prior to gate oxidation followed by deep etching of the resulting oxide or by plasma reactive sputter etching prior to gate oxidation.