论文部分内容阅读
低压CVD生成的多晶硅膜的导电性已作过测定并与常压下淀积的硅膜进行了比较。低压硅膜是在580℃和620℃下淀积的,用离子注入进行磷掺杂。620℃下淀积的是多晶硅膜,而580℃下淀积的是非晶体,但很容易在进一步的热处理中变为晶体。我们用两种磷剂量的低压硅膜就退火温度对电阻率的影响进行了研究,发现电阻率随退火温度的增加而减小。退火后580℃下淀积的硅膜的电阻率总是低于620℃下淀积的硅膜。退火温度较低时这种差別更为显著。在第二组试验中,磷注入在很宽的掺杂范围进行。相当于2×10~(15)-2×10(20)/Cm~3的平均杂质浓度。在小于6×10~(16)/Cm~3和大于2×10~(18)/Cm~3时,电阻率仅随杂质浓度缓慢变化,但在中间范围内,轻微的浓度变化就能使电阻率发生剧烈改变。同前面叙述的一样,580℃下淀积的硅膜的电阻率总是最低的,尤其是在中间掺杂范围内。经测定发现霍耳迁移率在杂质浓度为6×10~(18)/Cm~3左右为最大,并且在杂质浓度降低时迅速减小。这种观察到的性能与含有大量载流子陷阱的晶粒边界所包围的小微晶组成的硅膜中得到的结果相一致。在集成电路工艺中,多晶硅有许多重要的应用。在硅栅集成电路中,重掺杂的多晶硅膜用来作栅极(1),轻掺杂多晶硅膜通常在静态存储器中作高阻值电阻(2)。不久以前这些薄膜还是在大气压下放在凉内壁反应器中进行淀积的。硅衬底平放在反应器中一个由外部加热的基座上。已有许多研究人员对这种薄膜的电学性能作过报告。(4—8)近几年来,发展起一种低压化学气相淀积(LPCVD)系统(9)。这些系统的高容量和低成本使它们很快为集成电路制造厂家所采纳。由于这种反应器中的淀积速率、温度和压力与通常的显著不同,有必要对这种LPCVD反应器中淀积材料的电学性能作一研究。尤其重要的是这种薄膜在杂质浓度大范围变化时的电阻率情况和它在温度变化时的稳定性。斯坦福大学正在对这种低压下淀积的多晶硅的性能进行探讨研究。其研究的第一部分,报告了低压(系统)的结构、多晶硅膜及其在进一步热处理中的稳定性(10),本文将讨论磷注入低压多晶硅的电学性能并与那些常压下淀积的薄膜进行比较。不同退火温度对电阻率的影响也将加以报告。
The conductivity of the polysilicon film formed by low-pressure CVD was measured and compared with the silicon film deposited at atmospheric pressure. Low-voltage silicon films were deposited at 580 ° C and 620 ° C, and phosphorus doping was performed by ion implantation. The polycrystalline silicon film is deposited at 620 ° C, whereas the amorphous material is deposited at 580 ° C, but is easily crystallized in further heat treatment. We investigated the effect of annealing temperature on the resistivity of two low phosphorus silicon films and found that the resistivity decreases as the annealing temperature increases. The resistivity of the silicon film deposited at 580 ° C after annealing was always lower than that of the silicon film deposited at 620 ° C. This difference is even more pronounced when the annealing temperature is lower. In the second set of experiments, phosphorus implantation was performed over a wide range of doping. Corresponds to an average impurity concentration of 2 × 10 15 to 2 × 10 20 / cm 3. At less than 6 × 10 16 / cm 3 and more than 2 × 10 18 / cm 3, the resistivity changes only slowly with the impurity concentration, but in the middle range the slight change in concentration Resistivity changes dramatically. As previously described, the resistivity of the deposited silicon film at 580 ° C is always the lowest, especially in the intermediate doping range. It has been found that the Hall mobility is the largest at an impurity concentration of 6 × 10 ~ (18) / cm ~ 3 and rapidly decreases when the impurity concentration decreases. This observed behavior is consistent with the results obtained in a silicon film consisting of small crystallites surrounded by grain boundaries containing a large number of carrier traps. In integrated circuit technology, polysilicon has many important applications. In silicon gate integrated circuits, heavily doped polysilicon films are used for the gate (1), and lightly doped polysilicon films are typically used as high-resistance (2) resistors in static memory. Not long ago these films were also deposited in a cool inner wall reactor at atmospheric pressure. The silicon substrate is laid flat on an externally heated susceptor in the reactor. Many researchers have reported on the electrical properties of this film. (4-8) In recent years, a low-pressure chemical vapor deposition (LPCVD) system has been developed (9). The high capacity and low cost of these systems make them quickly adopted by integrated circuit manufacturers. Because of the markedly different deposition rates, temperatures and pressures in this reactor, it is necessary to study the electrical properties of the deposited materials in such LPCVD reactors. Of particular importance is the resistivity of such films as they vary widely over the concentration of impurities and their stability with temperature changes. Stanford is investigating the properties of polysilicon deposited at this low pressure. The first part of his research reports on the structure of low-voltage (system) polysilicon films and their stability in further heat treatment (10). This article discusses the electrical properties of low-voltage polysilicon implanted with phosphorus and compares them with those deposited at atmospheric pressure Compare. The effect of different annealing temperatures on resistivity will also be reported.