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对多种总线结构进行了简单比较;分析了ISA总线的数据传输机制;基于VHDL语言设计了一个ISA总线接口电路,该接口电路具有16位的数字量输入/输出、16路模拟信号输入、4路16位D/A输出和一个64位的计数器输出等功能;给出了程序片段要点.用MAX+PLUSⅡ软件进行了仿真调试和FPGA器件下载测试,结果表明实现了ISA总线的要求.
A variety of bus structures are briefly compared; ISA bus data transmission mechanism is analyzed; an ISA bus interface circuit is designed based on VHDL language, the interface circuit has 16 digital inputs / outputs, 16 analog inputs, 4 Way 16-bit D / A output and a 64-bit counter output and other functions; given the main points of the program fragment. MAX + PLUS Ⅱ software debugging and FPGA device download test results show that the ISA bus to achieve the requirements.