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使用两对NMOS管和衬底偏置技术,采用SMIC0.18μmCMOS工艺,为卫星导航双系统兼容接收机的射频集成电路芯片设计了一种超低压、超低耗NMOS衬底偏置混频器(NBBM,NMOS Bulk-Biased Mixer).以其中的GPS系统为例:射频信号、本振信号和中频信号分别为1575.42MHz,1570MHz和5.42MHz.测试表明:在1V电源电压下,驱动差分负载阻抗1000Ω时,混频器消耗电流约为1.37 mA,变频增益(GC)超过2.11 dB,输入1 dB压缩点(Pin-1 dB)约为-13 dBm;若加入运放驱动,变频增益可超过14 dB,但会带来线性度的降低、功耗以及面积的增加.
Using two pairs of NMOS transistors and substrate bias technology, a SMIC 0.18μm CMOS process is used to design an ultra-low-voltage, ultra-low-power NMOS substrate bias mixer for a satellite navigation dual-system compatible receiver radio frequency integrated circuit chip NBBM, and NMOS Bulk-Biased Mixer.) Taking the GPS system as an example, the RF signals, LO signals and IF signals are respectively 1575.42MHz, 1570MHz and 5.42MHz. The test shows that under a 1V supply voltage, the differential load impedance is driven to 1000Ω , The mixer consumes about 1.37 mA, the conversion gain (GC) exceeds 2.11 dB and the input 1 dB compression point (Pin-1 dB) is about -13 dBm. When added to the op amp, the conversion gain can exceed 14 dB , But will bring the linearity to reduce, the power consumption and the area increase.