美国一科研小组9月4日宣布,他们正在开发芯片内部互联新技术,有望研制出体积更小、速度更快、成本更低廉的三维芯片。他们首先将芯片层有效地粘接在一起,然后采用目前芯片业标准的“波形花纹”加工工艺来制造三维芯片,包括干法刻蚀钻孔,填充标准铜材料,以及用微细的铜线连接芯 A research group on the U.S. announced on September 4 that they are developing new technologies for inter-chip interconnects and are expected to develop three-dimensional chips that are smaller, faster and cheaper. They first bonded the chip layers together effectively and then fabricated three-dimensional chips using the current “corrugated” processing technology of the chip industry, including dry etching of holes, filling of standard copper materials, and fine copper wire connections core