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本文设计了一个系统,可以实现简易数字信号传输性能分析仪的功能。此分析仪主要包括三大模块:发生器模块,滤波器模块和接收器模块。数字信号发生器部分采用FPGA芯片产生伪随机码元序列。用三个截止频率不同的低通滤波器模拟信道的特性,接收端用FPGA从接收到的码元序列中提取出同步时钟信号,并将接收到的低信噪比信号滤除噪声后在示波器上显示出眼图。经测试整个系统工作稳定,输入信号动态范围大,眼图清晰,误码率低。
This article devised a system that enables simple digital signal transmission performance analyzer functions. This analyzer mainly includes three modules: generator module, filter module and receiver module. Part of the digital signal generator using FPGA chip pseudo-random symbol sequence. With three different cut-off frequency of the low-pass filter to simulate the characteristics of the channel, the receiver FPGA from the received symbol sequence to extract the synchronization clock signal, and the received low SNR signal filtered noise in the oscilloscope On the show eye diagram. After testing the entire system is stable, the input signal dynamic range, clear eye, bit error rate.