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在分析DALSA公司的IA D1型高速CCD器件驱动时序关系的基础上 ,设计了可调曝光时间的高速摄像机驱动时序发生器。选用复杂可编程逻辑器件 (CPLD)作为硬件设计平台 ,使用VHDL语言对驱动时序发生器进行了硬件描述 ,采用EDA软件对所设计的驱动时序发生器进行了功能仿真 ,针对Lattice公司的可编程逻辑器件ISPLSI5 2 5 6进行适配。系统测试结果表明 ,所研制的驱动时序发生器不仅可以满足高速CCD摄像机的驱动要求 ,而且还能够调节其曝光时间
Based on the analysis of the timing relationship of DALSA’s IA D1 high-speed CCD device driver, a high-speed camera-driven timing generator with adjustable exposure time is designed. Select complex programmable logic device (CPLD) as the hardware design platform, the use of VHDL language to drive the timing generator hardware description, the use of EDA software designed to drive the timing generator for functional simulation for Lattice’s programmable logic Device ISPLSI5 2 5 6 for adaptation. The system test results show that the developed drive timing generator can not only meet the high-speed CCD camera drive requirements, but also be able to adjust the exposure time