论文部分内容阅读
提出了一种新颖的基于ALU架构的FIR数字滤波器,这种架构采用存储器和计数器实现FIR滤波器的卷积运算。当FIR滤波器的阶数增加时,该架构的逻辑单元基本不变,存储空间仅线性增加,而不像传统分布式架构的存储空间呈指数增加。因此,这种基于ALU架构的FIR数字滤波器的等效逻辑门数大幅减少。FPGA综合结果表明,当FIR滤波器的阶数大于64阶时,基于ALU架构的FIR滤波器比传统分布式架构的滤波器使用更少的等效逻辑门数。
A novel FIR digital filter based on ALU architecture is proposed. This architecture uses the memory and counter to realize the FIR filter convolution operation. As the order of the FIR filter increases, the logical unit of the architecture remains essentially unchanged, with only a linear increase in storage space, unlike the exponential increase in storage space of traditional distributed architectures. Therefore, the equivalent logic gate number of this ALU-based FIR digital filter is greatly reduced. The results of FPGA synthesis show that the FIR filter based on ALU architecture uses less equivalent logic gates than the filter of traditional distributed architecture when the order of FIR filter is more than 64 orders.