基于消息传递的多指令流多数据流（ＭＩＭＤ）多机并行系统，提出一种组合电路测试图形生成的新的并行处理方法。该方法首先定义基本门电路的特征函数，通过特征函数的迭加，得到与被测电路对应的一约束网络的特征函数ＣＡＴＰＧ，用遗传算法计算ＣＡＴＰＧ的零点获得故障的测试。结果表明在电路的描述及操作、数据传送、算法实现等方面较其他方法有明显优势 Based on multi-instruction and multi-machine parallel system (MIMD), a novel parallel processing method for combinational circuit test pattern generation is proposed. The method first defines the eigenfunction of the basic gate and obtains the characteristic function CATPG of a constrained network corresponding to the circuit under test by superposition of the eigenfunction. The genetic algorithm is used to calculate the zero of CATPG to get the fault test. The results show that the circuit description and operation, data transfer, algorithm implementation, etc. than other methods have obvious advantages