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针对SOI功率集成电路,提出一种具有两级非平衡超结的SOI LDMOS高压器件。新结构通过调节超结的掺杂浓度,在漂移区形成两级超结结构。在器件反向耐压时,源端的超结n区被快速耗尽,过剩的p型电荷可以降低源端的峰值电场,同时提高漂移区中部的电场;而漏端的超结p区被快速耗尽,过剩的n区与n型外延层共同提供补偿电荷,这种阶梯分布的电荷补偿进一步优化了横向电场分布。这种两级非平衡超结结构缓解了横向超结器件中的衬底辅助耗尽效应,可提高器件的耐压。三维器件仿真结果表明,在漂移区长度为15μm时,该器件的耐压达到300V,较常规的超结器件和具有缓冲层的超结器件分别提高122%和23%。
For SOI power integrated circuits, a SOI LDMOS high-voltage device with two-stage unbalanced super-junction is proposed. The new structure forms a two-level super junction structure in the drift region by adjusting the doping concentration of the super junction. When the device is reversely withstand voltage, the super junction n region at the source is rapidly depleted. Excess p-type charge can reduce the peak electric field at the source and increase the electric field in the middle of the drift region. The super junction p region at the drain is rapidly depleted , The excess n region and the n-type epitaxial layer together provide compensating charge. The stepwise charge compensation further optimizes the horizontal electric field distribution. This two-stage unbalanced super-junction structure alleviates the substrate-assisted depletion effect in lateral superjunction devices and increases the device’s withstand voltage. Three-dimensional device simulation results show that the device withstands 300V when the drift region length is 15μm, which is 122% and 23% higher than that of the conventional super-junction device and the super junction device with buffer layer respectively.