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常规的数字锁相频率合成器具有电路简单，工作稳定可靠等特点，但由于鉴相器的倍增噪声往往比基准源的倍增噪声还要高，因而输出相位噪声较高，不能令人满意。本文提出一种双回路反馈锁相频率合成方案，成功地解决了这个问题，由于有效地抑制了鉴相器的倍增噪声，可获得较低的输出相位噪声。这种方案适用于诸如雷达系统等对频率源相位噪声有较高要求的电子设备。
The conventional digital phase-locked frequency synthesizer has the advantages of simple circuit, stable and reliable operation, etc. However, since the phase detector multiplication noise is often higher than the multiplication noise of the reference source, the output phase noise is high and unsatisfactory. This paper presents a double-loop feedback phase-locked frequency synthesis scheme, successfully solved the problem, due to effectively suppress the multiplier phase noise detector, you can get lower output phase noise. This kind of scheme is suitable for the electronic apparatus such as radar system to the phase noise of the frequency source has higher requirement.