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设计和研究了一种低压恒跨导增益提高互补金属氧化物半导体(CMOS)运算放大器。输入级采用互补差分对结构,使共模输入电压范围达到轨到轨,通过3倍电流镜控制尾电流使输入级总跨导恒定。中间级为增益提高级,通过反馈增大输出阻抗提高增益。输出级采用AB类结构,通过米勒补偿控制零点使系统稳定,此运放可用于低压低功耗电子设备中。整个电路用CSMC 0.5μm BCDMOS工艺参数进行设计,工作电压为2.7 V。Spectre仿真结果显示,此运放实现了直流开环增益90 dB(负载电阻R L=600Ω),相位裕度70°,增益带宽积1.4 MHz,静态电流0.18 mA。设计的运算放大器满足设计指标。
A low-voltage constant-transconductance gain-enhanced complementary metal-oxide-semiconductor (CMOS) operational amplifier is designed and researched. Input stage using complementary differential pair structure, so that the common-mode input voltage range to rail-to-rail, 3 times the current mirror control tail current total input transconductance constant. The middle stage is a stage of gain improvement, which increases the output impedance by feedback to increase the gain. The output stage uses a class AB structure that controls the zero point through Miller compensation to stabilize the system. This op amp can be used in low-voltage, low-power electronic equipment. The entire circuit is designed with CSMC 0.5μm BCDMOS process parameters, operating voltage is 2.7V. Specter simulation results show that the op amp achieves a DC open loop gain of 90 dB (load resistance R L = 600Ω), a phase margin of 70 °, a gain bandwidth product of 1.4 MHz and a quiescent current of 0.18 mA. The design of the operational amplifier to meet the design specifications.