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提出了一种10位200MHz高速流水线型模数转换器。该转换器共有9级,其中1到8级采用1.5位每级结构,最后一级采用2位闪速型模数转换器结构。设计中使用带增益自举的套筒式共源共栅运放,可同时获得高增益和大带宽,并通过运放共享技术提高工作速度。采用改进的数字校正算法,将运算分配到数字码的延迟步骤中,减少运算时间。仿真结果显示,在192MHz的采样速度下,模数转换器的有效位为8.9,SNR为58.3dB,SFDR为62.8dB,其他动态和静态特性也达到了较好的指标。
A 10-bit 200MHz high-speed pipeline A / D converter is proposed. The converter has a total of 9, of which 1 to 8 with 1.5 each level structure, the last level with 2-bit Flash ADC structure. Sleeve-type cascode op amps with gain bootstrap are used in the design to achieve both high gain and large bandwidth, while increasing op- eration speed through op amp sharing techniques. Adopt improved digital correction algorithm, the operation is assigned to the digital code delay step, reducing the operation time. The simulation results show that the effective bit of ADC is 8.9, the SNR is 58.3dB and the SFDR is 62.8dB at 192MHz sampling speed. Other dynamic and static characteristics also reach a better target.