本文介绍一个基于积木块方式的大规模专用集成电路芯片版图设计系统。该系统不仅采用了近期国际上先进的布局布线算法，而且引入了时延驱动布局、电源网平面化布线、通道最优划分和排序、单元动态调整以及详细布线优化等新的布图优化技术。 This article describes a block-based building blocks for large-scale integrated circuit chip layout design system. The system not only adopts the recent international advanced layout and routing algorithms, but also introduces new layout optimization technologies such as delay-driven layout, planar layout of power grid, optimal channel division and sequencing, dynamic adjustment of cells and detailed routing optimization.