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本文描述一种制造单片大功率线性集成电路的新技术。它基于—全新的工艺过程,即实质上是按照集成电路图形的轮廓来控制集成电路衬底上的单晶区和非常致密的多晶区的外延生长。多晶区用作隔离区和集电极引线通路(它必须是深扩散的),以提供大功率集成电路所要求的最重要的特性:即较高的击穿电压和较低的饱和电阻。其功率能力远远超过任何已经知道的在单片集成电路领域内所达到的水平。作为所设计的集成电路的典型例子是用于低频的 SEPP 型功率放大器,它的输出功率为20瓦(连续功率的平均值),在1千赫的频率和40伏的电源电压下,总谐波畸变含量少于8%。
This article describes a new technology for manufacturing monolithic high-power linear integrated circuits. It is based on - a completely new process that essentially controls the epitaxial growth of single crystal regions and very dense polycrystalline regions on integrated circuit substrates in accordance with the outline of the integrated circuit pattern. The polycrystalline region serves as the isolation region and the collector lead via (which must be deep-diffused) to provide the most important characteristics required by high-power integrated circuits: higher breakdown voltage and lower saturation resistance. Its power capability far surpasses what is known in the field of monolithic integrated circuits. A typical example of a designed integrated circuit is a SEPP-type power amplifier for low frequencies with an output power of 20 Watts (average of continuous power), a total harmonic at a frequency of 1 kHz and a supply voltage of 40 V Wave distortion content of less than 8%.