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针对高性能数字集成电路的应用需求,本文采用应变技术设计了一款3级环形振荡器电路,分析了该电路的频率、功耗等特性,建立了相应的数理模型,应用Sentaurus对构建的环振电路进行了仿真模拟,结果表明,在5ps的时间内将供电电源电压从0V增加到1V之后,应变CMOS构成的环振和普通CMOS构成的环振都顺利的进入到了稳态振荡,应变CMOS构成的环振的振荡频率较普通CMOS构成的环振的振荡频率提高了37.8%,为数字集成电路设计与性能的提升提供理论依据。
In order to meet the application requirements of high performance digital integrated circuits, a 3-level ring oscillator circuit is designed using the strain technique. The characteristics of the circuit such as frequency and power consumption are analyzed. Corresponding mathematical models are established. The simulation results show that after the power supply voltage is increased from 0V to 1V in 5ps, the ring oscillator composed of strained CMOS and the ring oscillator made of ordinary CMOS smoothly enter into the steady state oscillation and the strained CMOS The oscillation frequency of the ring oscillator is 37.8% higher than that of the conventional ring oscillator, which provides a theoretical basis for the design and performance improvement of digital integrated circuits.