We propose a unique approach for realizing dopingless impact ionization MOS(DL-IMOS) based on the charge plasma concept as a remedy for complex process flow. It uses work-function engineering of electrodes to form charge plasma as surrogate doping. This charge plasma induces a uniform p-region in the source side and an n-region in the drain side on intrinsic silicon film with a thickness less than the intrinsic Debye length. DL-IMOS offers a simple fabrication process flow as it avoids the need of ion implantation, photo masking and complicated thermal budget via annealing devices. The lower thermal budget is required for DL-IMOS fabrication enables its fabrication on single crystal silicon-on-glass substrate realized by wafer scale epitaxial transfer. It is highly immune to process variations, doping control issues and random dopant fluctuations, while retaining the inherent advantages of conventional IMOS. To epitomize the fabrication process flow for the proposed device a virtual fabrication flow is also proposed here. Extensive device simulation of the major device performance metrics such as subthreshold slope, threshold voltage, drain induced current enhancement, and breakdown voltage have been done for a wide range of electrodes work-function. To evaluate the potential applications of the proposed device at circuit level, its mixed mode simulations are also carried out. We propose a unique approach for realizing doping impact ionization MOS (DL-IMOS) based on the charge plasma concept as a remedy for complex process flow. It uses work-function engineering of electrodes to form charge plasma as surrogate doping. This charge plasma induces a uniform p-region in the source side and an n-region in the drain side on an intrinsic silicon film with a thickness less than the intrinsic Debye length. DL-IMOS offers a simple fabrication process flow as it avoids the need of ion implantation, photomasking and complicated thermal budget via annealing devices. The lower thermal budget is required for DL-IMOS fabrication allows fabrication of single crystal silicon-on-glass substrates realized by wafer scale epitaxial transfer. It is highly immune to process variations, doping control issues and random dopant fluctuations, while retaining the inherent advantages of conventional IMOS. To epitomize the fabrication process flow for the proposed device a virtual fa brication flow is also proposed here. Extensive device simulation of the major device performance metrics such as subthreshold slope, threshold voltage, drain induced current enhancement, and breakdown voltage have been done for a wide range of electrodes work-function. To evaluate the potential applications of the proposed device at circuit level, its mixed mode simulations are also carried out.