A continuous-time ∑△ modulator with a third-order loop filter and a 3-bit quantizer is realized. The modulator is robust to the excess loop delay, clock jitter, and RC product variations. When designing the integrator,an op-amp with novel GBW extension structure, improving the linearity of the loop filter, is adopted. The prototype chip is designed in a 130 nm CMOS technology, targeting FM radio applications. The experimental results show that the prototype modulator achieves a 72 d B dynamic range and a 70.7 d B signal to noise and distortion ratio over a 500 k Hz bandwidth with a 26 MHz clock, consuming 2.52 m W power from a 1.2 V supply. A continuous-time Σ Δ modulator with a third-order loop filter and a 3-bit quantizer is realized. The modulator is robust to the excess loop delay, clock jitter, and RC product variations. When designing the integrator, an op-amp The prototype results are presented in a 130 nm CMOS technology, targeting FM radio applications. The experimental results show that the prototype modulator achieves a 72 d B dynamic range and a 70.7 d B signal to noise and distortion ratio over a 500 k Hz bandwidth with a 26 MHz clock, consuming 2.52 m W power from a 1.2 V supply.