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在 IC的制造过程中 ,由于工艺的随机扰动 ,过刻蚀和欠刻蚀造成了导线条的宽度和线间距的变化 .论文在分析过刻蚀和欠刻蚀对 IC版图影响的基础上 ,提出了基于工艺偏差影响的 IC关键面积计算新模型和实现方法 .模拟实验表明模拟结果与理论分析是一致的
In IC manufacturing process, due to the process of random perturbations, over etching and under etching caused by the width of the conductor line and line spacing changes.On the basis of the analysis of over etching and under etching on the IC layout, A new model of IC critical area calculation and its realization method based on process deviation are proposed.The simulation results show that the simulation results are consistent with the theoretical analysis